MathWorks intros ASIC/FPGA design tools for use with Matlab

03/4/2012 | Electronics Weekly (U.K.)

MathWorks has introduced the HDL Coder, a software tool that generates hardware description language code from Matlab for implementing application-specific integrated circuit and field-programmable gate array designs, and the HDL Verifier, which is used to test ASIC/FPGA designs. Both tools are designed to tie in with products provided by Altera, Cadence Design Systems, Mentor Graphics and Xilinx.

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Electronics Weekly (U.K.)

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