Semiconductor roadmap is challenged by scaling issues

04/29/2012 |

The 20-nanometer process node is providing a number of technical challenges for silicon foundries, such as whether finFETs will be implemented in that IC generation, according to editor Mark LaPedus. The semiconductor industry's technology roadmap is also being complicated by the continuing difficulties with extreme ultraviolet lithography, with foundries planning to use other lithography techniques for making 20nm chips.

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